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Organization

The University of Texas at Austin
Contributors
Anup Ashok Kedilaya
Zihao Deng
Nishant Gupta
Chen-Hao Hsu
Jaydeep Kulkarni
Yao Lai
Chieh-Pu Lo
Supriyo Maji
Sai Subrahmanya Teja Nibhanupudi
Michael Orshansky
Sirish Oruganti
Sirish Oruganti
David Pan
Souradip Poddar
Yipeng Wang
Mengtian Yang
Xiuhao Zhang
Linran Zhao
Hanqing Zhu
Presentations
Research Panel
Chips and Systems for AI: Gains, Drains and the Uncharted Road Ahead
10:30am - 12:00pm PDT Wednesday, June 25 3012, Level 3
AI
Research Manuscript
GSAcc: Accelerate 3D Gaussian Splatting via Depth Speculation and Gaussian-centric Rasterization
4:15pm - 4:30pm PDT Wednesday, June 25 3000, Level 3
AI
AI3: AI/ML Architecture Design
Research Manuscript
INSIGHT: A Universal Neural Simulator Framework for Analog Circuits with Autoregressive Transformers
11:00am - 11:15am PDT Monday, June 23 3006, Level 3
EDA
EDA6: Analog CAD, Simulation, Verification and Test
Late Breaking Results
Late Breaking Results: Breaking Symmetry--- Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
Research Manuscript
Mixed-Precision Quantization for Deep Vision Models with Integer Quadratic Programming
11:15am - 11:30am PDT Tuesday, June 24 3001, Level 3
AI
AI1: AI/ML Algorithms
Networking
Work-in-Progress Poster
Optimal Front vs Back-side Signal Allocation for PPA Improvements in Advanced CMOS Featuring Back-side Metal Interconnects
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
DES5: Emerging Device and Interconnect Technologies
Research Manuscript
TransRoute: A Novel Hierarchical Transistor-Level Routing Framework Beyond Standard-Cell Methodology
2:45pm - 3:00pm PDT Tuesday, June 24 3004, Level 3
EDA
EDA7: Physical Design and Verification