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Organization

Georgia Institute of Technology
Contributors
Cong "Callie" Hao
Hao-Hsiang Hsiao
Jiawei Hu
Tushar Krishna
Lee Lerner
Chaojian Li
Sixu Li
Ziwei Li
Sung Kyu Lim
Yingyan Lin
Che-Kai Liu
Anni Lu
Yuan-Hsiang Lu
Azad Naeemi
Md Mizanur Rahaman Nayan
Joongun Park
Min Gyu Park
Amaan Rahman
Arijit Raychowdhury
Ananda Samajdar
Zhixin Song
Cheng Wan
Zishen Wan
Faaiq Waqar
Hanchen Yang
Zhifan Ye
Ismael Youssef
Shimeng Yu
Session Chairs
Yonggan Fu
Minah Lee
Chaojian Li
Saibal Mukhopadhyay
Presentations
Research Manuscript
A Systematic Approach for Multi-Objective Double-Side Clock Tree Synthesis
2:15pm - 2:30pm PDT Wednesday, June 25 3006, Level 3
EDA
EDA7: Physical Design and Verification
Research Manuscript
BS-PDN-Last: Towards Optimal Power Delivery Network Design With Multifunctional Backside Metal Layers
4:30pm - 4:45pm PDT Tuesday, June 24 3003, Level 3
Design
DES4: Digital and Analog Circuits
Research Panel
Chips and Systems for AI: Gains, Drains and the Uncharted Road Ahead
10:30am - 12:00pm PDT Wednesday, June 25 3012, Level 3
AI
Workshop
DCgAA 2025: The 2nd International Workshop on DeepLearning-Hardware Co-Design for Generative AI Acceleration
9:00am - 12:30pm PDT Sunday, June 22 3003, Level 3
AI
Sunday Program
Research Manuscript
DCO-3D: Differentiable Congestion Optimization in 3D ICs
1:45pm - 2:00pm PDT Wednesday, June 25 3006, Level 3
EDA
EDA7: Physical Design and Verification
Research Manuscript
EPOC: A Novel Pulse Generation Framework Incorporating Advanced Synthesis Techniques for Quantum Circuits
1:30pm - 1:45pm PDT Monday, June 23 3003, Level 3
Design
DES6: Quantum Computing
Research Manuscript
GauRast: Enhancing GPU Triangle Rasterizers to Accelerate 3D Gaussian Splatting
2:15pm - 2:30pm PDT Wednesday, June 25 3000, Level 3
AI
AI3: AI/ML Architecture Design
Research Manuscript
GNN-MLS: Signal Routing in Mixed-Node 3D ICs through GNN-Assisted Metal Layer Sharing
2:00pm - 2:15pm PDT Wednesday, June 25 3006, Level 3
EDA
EDA7: Physical Design and Verification
Networking
Work-in-Progress Poster
HyDra: SOT-CAM Based Vector Symbolic Macro for Hyperdimensional Computing
6:00pm - 7:00pm PDT Sunday, June 22 Level 3 Lobby
Research Manuscript
InsightAlign: A Transferable Physical Design Recipe Recommender Based on Design Insights
11:15am - 11:30am PDT Wednesday, June 25 3000, Level 3
AI
AI2: AI/ML Application and Infrastructure
Engineering Special Session
Keeping the Guard Up with Security across the Board
1:30pm - 3:00pm PDT Wednesday, June 25 2010, Level 2
Back-End Design
Late Breaking Results
Late Breaking Results: FPGen-3D: Automated Framework for 3D-FPGA Architecture Generation and Exploration
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
Research Manuscript
Monolithic 3D FPGA Design and Synthesis with Back-End-of-Line Configuration Memories
5:15pm - 5:30pm PDT Monday, June 23 3001, Level 3
Design
DES5: Emerging Device and Interconnect Technologies
Research Manuscript
Neural Scaling Laws for Graph Neural Networks in Atomistic Materials Modeling
4:45pm - 5:00pm PDT Monday, June 23 3000, Level 3
AI
AI2: AI/ML Application and Infrastructure
Research Manuscript
NSFlow: An End-to-End FPGA Framework with Scalable Dataflow Architecture for Neuro-Symbolic AI
10:30am - 10:45am PDT Tuesday, June 24 3000, Level 3
AI
AI4: AI/ML System and Platform Design
Research Manuscript
ReaLM: Reliable and Efficient Large Language Model Inference with Statistical Algorithm-Based Fault Tolerance
5:15pm - 5:30pm PDT Wednesday, June 25 3008, Level 3
Systems
SYS6: Time-Critical and Fault-Tolerant System Design
Sessions
Research Manuscript
Balancing Speed and Memory: Advancing LLM Acceleration
10:30am - 12:00pm PDT Monday, June 23 3001, Level 3
AI
AI4: AI/ML System and Platform Design
Research Manuscript
LLM Uprising: Fast & Furious
1:30pm - 3:00pm PDT Tuesday, June 24 3002, Level 3
AI
AI4: AI/ML System and Platform Design
Research Manuscript
Flattering Splatting: Gaussian Splatting, Video Processing, and Diffusion
1:30pm - 3:00pm PDT Wednesday, June 25 3000, Level 3
AI
AI3: AI/ML Architecture Design
Research Manuscript
Skip the Bits!: Innovative Arithmetic, Architecture, Co-Design for AI
3:30pm - 5:30pm PDT Wednesday, June 25 3000, Level 3
AI
AI3: AI/ML Architecture Design