Organization
Sun Yat-sen University
Presentations
Research Manuscript
EDA
EDA5: RTL/Logic Level and High-level Synthesis
Networking
Work-in-Progress Poster
Research Manuscript
Design
DES1: SoC, Heterogeneous, and Reconfigurable Architectures
Research Manuscript
Design
DES1: SoC, Heterogeneous, and Reconfigurable Architectures
Networking
Work-in-Progress Poster
Research Manuscript
Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design
4:15pm - 4:30pm PDT Wednesday, June 25 3003, Level 3EDA
EDA2: Design Verification and Validation
Research Manuscript
AI
AI4: AI/ML System and Platform Design
Research Manuscript
Security
SEC1: AI/ML Security/Privacy
Research Manuscript
AI
AI2: AI/ML Application and Infrastructure
Research Manuscript
Systems
SYS3: Embedded Software
Research Manuscript
Design
DES1: SoC, Heterogeneous, and Reconfigurable Architectures