Close

Organization

University of Minnesota
Contributors
Yu Cao
Farzad Razi
Marc Riedel
Sachin S. Sapatnekar
Session Chairs
Yu Cao
Presentations
Research Special Session
EDA for Heterogeneous Integration
5:00pm - 5:30pm PDT Tuesday, June 24 3010, Level 3
Design
Late Breaking Results
Late Breaking Results: In-Memory Arithmetic: Enabling Division with Stochastic Logic
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
Networking
Work-in-Progress Poster
Speeding Up Global Placement Method by Integrating a Precorrected FFT Solver
6:00pm - 7:00pm PDT Sunday, June 22 Level 3 Lobby
Workshop
Workshop on Chiplet-based Heterogeneous Integration and CO-design (CHICO)
9:00am - 5:00pm PDT Sunday, June 22 3000, Level 3
Design
Sunday Program
Sessions
Research Manuscript
Breaking Boundaries in Accelerator Design: Photonic, Time-Domain, and Security-Driven AI
10:30am - 12:00pm PDT Monday, June 23 3002, Level 3
Design
DES2A: In-memory and Near-memory Computing Circuits
Research Special Session
Chiplet-based Heterogenous Integration: Pushing Beyond Moore's Law
3:30pm - 5:30pm PDT Tuesday, June 24 3010, Level 3
Design