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Organization

Yonsei University
Contributors
Heelim Choi
Insu Choi
Jeonghoon Choi
Jaeyong Chung
Haeeun Jeong
Ipoom Jeong
Shinnung Jeong
Seokwon Kang
Hanjun Kim
Sungbin Kim
Sungwoo Kim
Chan Lee
Hyunwuk Lee
Jaeho Lee
Ju Min Lee
Yongjun Park
Won Woo Ro
Joon-Sung Yang
Hoyun Youm
Presentations
Networking
Work-in-Progress Poster
Approximation-based Inter-PE Communication-free Image Filtering for Commodity PIM
6:00pm - 7:00pm PDT Sunday, June 22 Level 3 Lobby
Research Manuscript
CVMAX: Accelerator Architecture with Polar Form Multiplication for Complex-Valued Neural Networks
5:00pm - 5:15pm PDT Wednesday, June 25 3000, Level 3
AI
AI3: AI/ML Architecture Design
Research Manuscript
DBC: Drift-aware Binary Code for Drift-tolerant Deep Neural Networks
3:30pm - 3:45pm PDT Monday, June 23 3001, Level 3
Design
DES5: Emerging Device and Interconnect Technologies
Networking
Work-in-Progress Poster
Pacemaker: Energy-Efficient Speculative Scheduling Window Resizing without Performance Impact
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
Research Manuscript
Supporting Register-based Addressing Modes for in-DRAM PIM ISAs
4:30pm - 4:45pm PDT Wednesday, June 25 3001, Level 3
Design
DES2B: In-memory and Near-memory Computing Architectures, Applications and Systems