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Organization

National Yang Ming Chiao Tung University
Contributors
Hao-Ju Chang
Wen-Tse Chang
Chi-Jui Chen
Hung-Ming Chen
Shih-Yu Chen
Shuo-Han Chen
Yu-Chan Keng
Bo-Cheng Lai
Yih-Lang Li
Yih-Lang Li
Ting-Xin Lin
Chien-Nan Liu
Chun-Chien Liu
Yu-Chun Pai
Meng-Yu Shih
Chen-Jui Tu
Tzu-Hsiang Wei
Chun-Feng Wu
Session Chairs
Chun-Feng Wu
Presentations
Networking
Work-in-Progress Poster
A Graph-Based Approach for Optimizing Pin Access in Nanosheet FET Standard Cell Library Synthesis
6:00pm - 7:00pm PDT Sunday, June 22 Level 3 Lobby
DES5: Emerging Device and Interconnect Technologies
Networking
Work-in-Progress Poster
ConNAS4ML: Constraint-Aware Differentiable Neural Architecture Search for Efficient FPGA Deployment
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
DES5: Emerging Device and Interconnect Technologies
Research Manuscript
Enabling Data-Deduplication-Assisted Data Relocation for Interlaced Magnetic Recording
5:00pm - 5:15pm PDT Tuesday, June 24 3008, Level 3
Systems
SYS3: Embedded Software
Networking
Work-in-Progress Poster
Guard Ring- and Diffusion-Sharing Embedded FinFET Array Placement
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
DES5: Emerging Device and Interconnect Technologies
Late Breaking Results
Late Breaking Results: Scalable GPU-Friendly Parallelization for Sweep-Based Maze Routing
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
Research Manuscript
P-DAC: Power-Efficient Photonic Accelerators for LLM Inference
10:45am - 11:00am PDT Monday, June 23 3002, Level 3
Design
DES2A: In-memory and Near-memory Computing Circuits
Research Manuscript
Reinforcement Learning-Driven Window Selection for Enhanced Window-Based Rip-up and Reroute in Chip Detailed Routing
2:15pm - 2:30pm PDT Tuesday, June 24 3004, Level 3
EDA
EDA7: Physical Design and Verification
Research Manuscript
Synthesis of CFET Cell Library Leveraging Backside Metal Routing
11:45am - 12:00pm PDT Wednesday, June 25 3006, Level 3
EDA
EDA7: Physical Design and Verification
Research Manuscript
UPVSS: Jointly Managing Vector Similarity Search with Near-Memory Processing Systems
2:45pm - 3:00pm PDT Monday, June 23 3002, Level 3
Design
DES2B: In-memory and Near-memory Computing Architectures, Applications and Systems
Sessions
Research Manuscript
Leveraging the Memory Hierarchy for Emerging Applications and Hardware
1:30pm - 3:00pm PDT Monday, June 23 3008, Level 3
Systems
SYS5: Embedded Memory and Storage Systems