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Organization

The University of Texas at Dallas
Contributors
Kanad Basu
Swastik Bhattacharya
Ameya Bhave
Benjamin Carrion Schaefer
Navnil Choudhury
Sanjay Das
Tianning Gao
Anand Menon
Samit Miftah
Baharealsadat Parchamdar
Amisha Srivastava
Dian Zhou
Presentations
Research Manuscript
ADVISOR: Approximate Computing-frienDly High-LeVel Synthesis DesIgn Space ExplORer
2:30pm - 2:45pm PDT Wednesday, June 25 3004, Level 3
EDA
EDA5: RTL/Logic Level and High-level Synthesis
Research Manuscript
InterConFuzz: A Fuzzing-based Comprehensive NoC Verification Framework
3:30pm - 3:45pm PDT Wednesday, June 25 3003, Level 3
EDA
EDA2: Design Verification and Validation
Research Manuscript
Look Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration
4:15pm - 4:30pm PDT Tuesday, June 24 3004, Level 3
EDA
EDA1: Design Methodologies for System-on-Chip and 3D/2.5D System-in Package
Research Manuscript
Machine Learning-Driven STL Generation for Enhancing Functional Safety of E/E Systems
1:45pm - 2:00pm PDT Tuesday, June 24 3006, Level 3
EDA
EDA9: Design for Test and Silicon Lifecycle Management
Research Manuscript
MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing
2:45pm - 3:00pm PDT Wednesday, June 25 3003, Level 3
EDA
EDA6: Analog CAD, Simulation, Verification and Test
Networking
Work-in-Progress Poster
OpenAssert: Towards Open-Source Large Language Models for Assertion Generation
6:00pm - 7:00pm PDT Sunday, June 22 Level 3 Lobby
Research Manuscript
ZXNet: ZX Calculus-Driven Graph Neural Network Framework for Quantum Circuit Equivalence Checking
4:45pm - 5:00pm PDT Monday, June 23 3004, Level 3
Design
DES6: Quantum Computing