Close

Organization

GlobalFoundries
Contributors
Farzana Akhter
Sven Beyer
Stephen Burgess
Seema Dhull
Stefan Duenkel
Romain Feuillette
Navneet Jain
Dominik Kleimaier
Heather Lazar
Halid Mulaosmanovic
Jignesh Patel
Nolan Pavek
David Pritchard
Sandeep Puri
Benoit Ramadout
Aditya Ramesha
Collin Tranter
Presentations
Engineering Poster
Networking
Advanced Yield Prediction for SRAM Bitcells with Rare Defect Modeling Leveraging AI-Powered Methodology
5:00pm - 6:00pm PDT Monday, June 23 Engineering Posters, Level 2 Exhibit Hall
Research Manuscript
Enhancing Parallelism and Energy-Efficiency in SOT-MRAM based CIM Architecture for On-Chip Learning
4:15pm - 4:30pm PDT Monday, June 23 3001, Level 3
Design
DES5: Emerging Device and Interconnect Technologies
Engineering Presentation
Enhancing PDK Library Validation with Machine Learning. A Novel Approach to Layout Comparison
11:00am - 11:15am PDT Tuesday, June 24 2012, Level 2
AI
Back-End Design
Engineering Poster
IC Folding for Enhanced Performance in Homogeneous RF-AMS Systems
5:00pm - 6:00pm PDT Tuesday, June 24 Engineering Posters, Level 2 Exhibit Hall
Engineering Poster
Networking
Real-time Process Margin-based Layout Optimization
5:00pm - 6:00pm PDT Monday, June 23 Engineering Posters, Level 2 Exhibit Hall
Research Manuscript
Towards Uncertainty-aware Robotic Perception via Mixed-signal BNN Engine Leveraging Probabilistic Quantum Tunneling
4:45pm - 5:00pm PDT Tuesday, June 24 3003, Level 3
Design
DES4: Digital and Analog Circuits