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Powering the Future of AI: Are Standards an Enabler or a Bottleneck?: Panel with Complimentary Lunch, Sponsored by Si2
DescriptionAs AI workloads scale dramatically, power, thermal management, and reliability have emerged as critical concerns. Industry standards such as IEEE 2416 and IEEE 1801 have attempted to address these issues through system-level power and thermal modeling. But are these standards accelerating innovation, or have they become a bottleneck for rapid technological advancement?

Powering the Future of AI features panelists from industry leaders in design and methodology for power and thermal optimization, including IBM and Cadence Design Systems. The lunch forum includes experienced leaders in the semiconductor industry and EDA standardization and targets system designers and architects, logic and circuit designers, validation engineers, CAD managers, researchers, and academicians.

Key discussion points include:
o Standards: Foundation or Constraint to Innovation in AI and system-level power management?
o Practical impacts and industry adoption: Real-world experiences from semiconductor foundries, AI hardware developers, and system integrators.
o Bridging Gaps: The role of emerging IEEE 2416 extensions (A/MS, thermal, multi-voltage) in addressing AI workloads.
o Cross-industry perspectives from EDA tool vendors, system integrators, and IP developers.
o How should standards evolve to effectively enable next-gen AI applications?

Register now! Space is limited, and registration is required for complimentary lunch. For more details go to si2.org