Presentation
Building Trust in GenAI for Semiconductor Design: Addressing Data Provenance, Quality, and Traceability Challenges
DescriptionThe semiconductor industry is on the cusp of an AI revolution, yet significant barriers persist, particularly around data provenance and liability. While Generative AI (GenAI) technologies have transformed software development, their adoption in semiconductor design remains hindered by the industry's unique challenges—such as highly protected intellectual property (IP) and the extraordinary costs associated with errors. Unlike the software domain, where open-source practices are common, the hardware space demands a more secure and traceable approach.
This presentation will explore the emerging role of GenAI in semiconductor and embedded systems design, focusing on the critical issues of data versioning, provenance, and traceability in training internal AI models. These factors are essential to ensure model reproducibility, reliability, and accountability, as well as to mitigate risk and foster trust in AI adoption. We will explore concerns around "data contamination" when using external or purchased IP as well as liability concerns over whether such data can lawfully and ethically be used to train AI.
Additionally, we will introduce IP Lifecycle Management (IPLM) as a robust framework for managing and tracking the IPs used in AI training. By leveraging an IPLM platform, organizations can establish a secure, compliant, and controlled approach to training AI models, paving the way for innovative applications in semiconductor design.
This presentation will explore the emerging role of GenAI in semiconductor and embedded systems design, focusing on the critical issues of data versioning, provenance, and traceability in training internal AI models. These factors are essential to ensure model reproducibility, reliability, and accountability, as well as to mitigate risk and foster trust in AI adoption. We will explore concerns around "data contamination" when using external or purchased IP as well as liability concerns over whether such data can lawfully and ethically be used to train AI.
Additionally, we will introduce IP Lifecycle Management (IPLM) as a robust framework for managing and tracking the IPs used in AI training. By leveraging an IPLM platform, organizations can establish a secure, compliant, and controlled approach to training AI models, paving the way for innovative applications in semiconductor design.
Presenter
VP of Solutions Engineering for Helix IPLM
Event Type
Exhibitor Forum
TimeMonday, June 233:30pm - 4:00pm PDT
LocationExhibitor Forum, Level 1 Exhibit Hall