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Taming the Waveform Tsunami: Agentic AI for Smarter Debugging
DescriptionModern chip design verification generates massive waveform dumps—often terabytes in size—making it nearly impossible for engineers to manually debug and trace root causes efficiently. Traditional waveform viewers and rule-based scripts fall short when faced with the scale, complexity, and subtlety of today's RTL designs. In this Exhibitor Forum session, we introduce ChipAgents, an agentic AI system purpose-built to tackle waveform analysis at scale. By combining structured reasoning, semantic search, and interactive agents, ChipAgents empowers verification engineers to ask natural-language questions, trace failure propagation across time and modules, and receive contextualized explanations grounded in the RTL and waveform data.

Our approach moves beyond static signal inspection. Agents dynamically explore the design hierarchy, generate hypotheses, and interpret causality—turning waveform dumps into actionable insights. Whether you're facing race conditions, signal glitches, or protocol violations, our system helps you find the needle in the haystack—faster and more reliably than ever before.

We'll showcase real-world case studies where ChipAgents successfully identified root causes in minutes—debugs that previously took days. The demo includes multi-agent workflows that collaborate across testbench logs, waveform traces, and RTL to deliver end-to-end failure analysis.

This talk will appeal to EDA tool developers, DV engineers, and design leads seeking scalable, AI-powered solutions for debugging in the era of increasingly complex SoCs. Join us to see how agentic AI is redefining RTL understanding—one waveform at a time.