Presentation
Guided Physical Power Optimization of AI Silicon
DescriptionIn the realm of power optimization, focusing significant effort on power enhancement for key blocks is essential as blocks follow the Pareto Rule. Traditional unidirectional PD flows often fall short, potentially trapping designers in local minima. However, leveraging designers' insights on these key blocks can significantly improve power Quality of Results (QoR) if, at every stage, PD designers analyze results to facilitate better trade-offs earlier in the flow. This presentation will discuss some approaches for guiding initial phases of the flow based on analysis of opportunities available in later stages of the flow and results thereof.
Event Type
Engineering Poster
TimeTuesday, June 245:00pm - 6:00pm PDT
LocationEngineering Posters, Level 2 Exhibit Hall