Presentation
IP-Report: Methodology to Identify Simple Yet Effective Module Based Power Saving Techniques
DescriptionRTL low power design methodologies focusing on observability and stability-based clock gating schemes are central to almost all power tools available in the market today but is that sufficient? Despite iterating these schemes over multiple revisions of the RTL, non-ideal power still slips through the design and shows up at silicon.
Event Type
Engineering Poster
Networking
TimeWednesday, June 2512:15pm - 1:15pm PDT
LocationEngineering Posters, Level 2 Exhibit Hall