Presentation
HBM Timing Methodology with Liberty LVF
DescriptionTiming OCV margin for mixed-signal IP blocks has been a single derate value during timing closure and signoff. This derate value must cover all critical paths, resulting in significant over-margin for the vast majority of the timing paths with much smaller OCV requirements, which in turn results in longer timing closure cycle and increased area and power. Liberty LVF has been widely adopted in standard cell design, but it has not crossed over into the modeling of large mixed-signal IP blocks due to the prohibitive Monte Carlo runtime of these large and complex simulations. We have collaborated with Empyrean to deploy their critical path based LVF characterization tool to generate LVF models for selected library arcs that are automatically merged into our in-house nominal Liberty files. This new characterization and timing methodology has been proven on the HBM design, and it resulted in expected and significant reduction in timing OCV margin. Success from this new methodology is being proliferated to other mixed-signal design IPs.
Event Type
Engineering Poster
Networking
TimeMonday, June 235:00pm - 6:00pm PDT
LocationEngineering Posters, Level 2 Exhibit Hall