Presentation
Leveraging Machine Learning to Automate Waiver Generation for Static Lint Violations
DescriptionModern static linting tools are indispensable for ensuring high-quality RTL designs by identifying syntactic, structural, and coding-style issues. However, these tools often generate an overwhelming number of violations, many of which are false positives that require manual filtering and waiver creation. This time-consuming process not only burdens RTL designers but also introduces risk of human error. In response, we propose a novel Machine Learning (ML) based framework that automatically learns from historically waived violations and applies similar waivers to newly flagged issues. By representing RTL snippets and violations as graph structures, we employ Graph Convolution Networks (GCNs) and similarity-compute (Graph2Vec) techniques to identify patterns that warrant waiver recommendations. Experimental results show high accuracy and recall in predicting new waivers, as well as substantial time savings and productivity gains. This approach significantly reduces the manual effort required to handle static lint outputs and paves the way for more intelligent and scalable verification flows in the semiconductor design process.
Event Type
Engineering Poster
Networking
TimeMonday, June 235:00pm - 6:00pm PDT
LocationEngineering Posters, Level 2 Exhibit Hall
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