Presentation
Active Device Testkeys Enable FEOL-Process Monitoring and Performance Improvement
DescriptionAs the demand for high performance and energy efficiency becomes increasingly urgent, integrated circuits continue to evolve towards advanced nodes to meet application requirements. Typically, to avoid active region process defects and ensure product yield, factories provide relatively conservative design rules and broad model files. This leads to designs that cannot be based on the real margin, resulting in performance and power wastage.
To address these issues, we conduct research on testkey in active region. By designing testkey with specific sizes and structures and conducting simulation consistency analysis, we evaluate the DC performance shifts of active region devices under normal conditions, thereby enabling process monitoring. In addition, we analyze the performance of different types of devices under parameters such as high voltage and isolation, providing corresponding design insights for specific design scenarios, and meeting special customization requirements such as high performance computing and low power consumption. This research can effectively assess the consistency of Spice2Silicon and establish a process defect database, accurately reflecting the actual performance level and fluctuation range of the process platform, providing effective guidance for enhancing product competitiveness. Furthermore, it helps explore the performance limits of devices, laying a theoretical foundation for subsequent special designs and applications.
To address these issues, we conduct research on testkey in active region. By designing testkey with specific sizes and structures and conducting simulation consistency analysis, we evaluate the DC performance shifts of active region devices under normal conditions, thereby enabling process monitoring. In addition, we analyze the performance of different types of devices under parameters such as high voltage and isolation, providing corresponding design insights for specific design scenarios, and meeting special customization requirements such as high performance computing and low power consumption. This research can effectively assess the consistency of Spice2Silicon and establish a process defect database, accurately reflecting the actual performance level and fluctuation range of the process platform, providing effective guidance for enhancing product competitiveness. Furthermore, it helps explore the performance limits of devices, laying a theoretical foundation for subsequent special designs and applications.
Event Type
Engineering Poster
Networking
TimeMonday, June 235:00pm - 6:00pm PDT
LocationEngineering Posters, Level 2 Exhibit Hall