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An Efficient Methodology of Analyzing Rush Current in Power Gated Design
Description* Lumped model-based estimation can be done which is faster, but it has accuracy issues.
Another way is we can do ramp-up analysis on complete design which is having multi-million node
which is more accurate. In this case simulation will run from days to weeks time as it measure
voltage for each node.

* Running simulation for number of weeks to completely turn-on power net, may result in huge
impact on paid LSF services. Therefore, some voltage threshold-based solution is required

* In early phase of a design, power gates optimization plays an important and time-consuming role
Focus would be to identify accurate number of power gates within a time frame
* How much time voltage waveform is taking to reach 80/90 % of ideal voltage
* Can we do adaptive resolutions-based runs, or can we cut down the simulation when switched
nets are above used defined threshold.

* In early stage of design implementation cycle, Design Scenarios like Isolated islands, power gates
triggering issues, irregular turn-on time of power gates etc. came in picture.

* otherwise doing early ramp-up analysis, debugging of steeps in current waveforms, identification of
different chains turning-on patterns, etc. these all scenarios we have to take care.

* Some cluster-based debug reports would be helpful here
Event Type
Engineering Poster
Networking
TimeMonday, June 235:00pm - 6:00pm PDT
LocationEngineering Posters, Level 2 Exhibit Hall