Presentation
Generation of Failure Inspection Pattern without Design Impact during P&R in BSPDN Design
DescriptionThis paper presents an effective and efficient design method for inserting failure inspection patterns at BSPDN (Back-Side Power Delivery Network) designs. BSPDN designs provide more signal resources and mitigate IR-drop during front-side design, resulting in better power integrity and improved performance. However, since the conventional silicon failure inspection method of FSPDN (Front-Side Power Delivery Network) cannot be used, an appropriate method is required to inspect failures in silicon. In this paper, two insertion method for failure inspection have been represented. One method is to use inspection patterns of the topmost routing layer for electrical failure inspection (EFI). The topmost inspection patterns are connected to the target nets with the conventional auto routing method without changing the existing signal routings of the nets. The other one is die-lens, which is an empty metal-free region, for optical failure inspection (OFI). These two efficient failure inspection patterns can be used at the wafer or package level to investigate silicon failure point. We have designed a BSPDN test vehicle using the proposed method and obtained satisfactory results.
Event Type
Engineering Presentation
TimeTuesday, June 2411:30am - 11:45am PDT
Location2012, Level 2