Presentation
Hybrid and Adaptive Digital Filter architecture for Robust tracking of On-chip Low Frequency Oscillator Period, enabling Crystal less BLE operation in Low Power Wireless MCUs
DescriptionIndustry is moving towards crystal less System on Chip(SOC) designs to save on cost and board area.
With the move towards crystal less SOCs, the low frequency crystal oscillator(LFXT) will be replaced by on chip oscillator(LFOSC). But LFOSC is poorer in terms of jitter & Random Telegraph Noise (RTN) performance.
Also LFOSC frequency characteristics like the period jitter and frequency standard deviation, can change significantly with the change in oscillator architecture, process node or any other oscillator peripheral circuitry.
Uncharacterized oscillator behavior makes the design of frequency sensitive digital logic like the real time clock (RTC) very challenging, especially in an ultra low power(ULP) MCU.
To keep the RTC running, we measure the time period of a low frequency clock (~32Khz) using a high frequency clock (which is very accurate, but consumes high power), which is typically hundreds of MHz.
But in a ULP MCU, the high frequency clock is available for <1% of the MCU run time. This makes time keeping challenging.
Bluetooth Low Energy(BLE) standard demands that in 1s, the time should not drift by more than 500ppm (i.e. 500us). Failing to do so will result in a loss of BLE connection.
This work proposes a digital filter architecture which is agnostic of analog oscillator architecture, can be adapted to any kind of oscillator noise characteristics, and will always meet the 1s BLE spec of 500ppm. Thus enabling a crystal less solution for BLE MCU.
With the move towards crystal less SOCs, the low frequency crystal oscillator(LFXT) will be replaced by on chip oscillator(LFOSC). But LFOSC is poorer in terms of jitter & Random Telegraph Noise (RTN) performance.
Also LFOSC frequency characteristics like the period jitter and frequency standard deviation, can change significantly with the change in oscillator architecture, process node or any other oscillator peripheral circuitry.
Uncharacterized oscillator behavior makes the design of frequency sensitive digital logic like the real time clock (RTC) very challenging, especially in an ultra low power(ULP) MCU.
To keep the RTC running, we measure the time period of a low frequency clock (~32Khz) using a high frequency clock (which is very accurate, but consumes high power), which is typically hundreds of MHz.
But in a ULP MCU, the high frequency clock is available for <1% of the MCU run time. This makes time keeping challenging.
Bluetooth Low Energy(BLE) standard demands that in 1s, the time should not drift by more than 500ppm (i.e. 500us). Failing to do so will result in a loss of BLE connection.
This work proposes a digital filter architecture which is agnostic of analog oscillator architecture, can be adapted to any kind of oscillator noise characteristics, and will always meet the 1s BLE spec of 500ppm. Thus enabling a crystal less solution for BLE MCU.
Event Type
Engineering Presentation
TimeWednesday, June 2511:15am - 11:30am PDT
Location2010, Level 2
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