Presentation
AACT: Automated Analog Coverage Tool for Mixed Signal Verification
DescriptionWe introduce a scalable and efficient framework for enhancing the verification and tracking of analog IPs focusing on comprehensive coverage across power modes. We present a first of its kind, automated analog property centric verification quantification flow in a highly digital dominated framework.
We present a robust framework, ensuring a systematic creation of range, frequency, ramp, glitch checks for mixed signal designs tailored to their characteristics. For stimulus evaluation, auto addition of basic checkers, helps identify gaps in stimulus, ensuring that all critical scenarios are exercised.
The proposed flow is flexible, scalable, allowing user customization for fine tuning verification parameters. Presented approach facilitates comprehensive validation of IP/design integration at higher abstraction levels and automates module verification within the System On Chip (SoC) context. Proposed flow efficiently supports mixed-signal verification environments encompassing both SPICE circuits and analog behavioral models enabling faster interception in Mixed Signal Design.
We present a robust framework, ensuring a systematic creation of range, frequency, ramp, glitch checks for mixed signal designs tailored to their characteristics. For stimulus evaluation, auto addition of basic checkers, helps identify gaps in stimulus, ensuring that all critical scenarios are exercised.
The proposed flow is flexible, scalable, allowing user customization for fine tuning verification parameters. Presented approach facilitates comprehensive validation of IP/design integration at higher abstraction levels and automates module verification within the System On Chip (SoC) context. Proposed flow efficiently supports mixed-signal verification environments encompassing both SPICE circuits and analog behavioral models enabling faster interception in Mixed Signal Design.
Event Type
Engineering Presentation
TimeWednesday, June 2510:45am - 11:00am PDT
Location2008, Level 2
Front-End Design
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