Presentation
Late Breaking Results: Versatile 4:1 Multiplexer Using 1T1R RRAM Crossbar for High Speed In-Memory Computing
DescriptionThis paper presents a high speed NAND based 4:1 Multiplexer (MUX) for various logic operations in a Resistive-Random access memory crossbar structure. Compared to existing 4:1 MUX designs that require 10 steps, our proposed method completes execution in 3 steps. Additionally, proposed 4:1 MUX
based Full adder, Full subtractor and 1-bit Comparator reduce clock cycles by 75% compared to state-of-the-art. Despite an increase in memristor count, the reduction in computational delay makes this approach promising for fast in-memory computing.
based Full adder, Full subtractor and 1-bit Comparator reduce clock cycles by 75% compared to state-of-the-art. Despite an increase in memristor count, the reduction in computational delay makes this approach promising for fast in-memory computing.
Event Type
Late Breaking Results
TimeMonday, June 236:00pm - 7:00pm PDT
LocationLevel 2 Lobby