Presentation
PECA: Polyhedral-Based Efficient Compiler for AI Applications on CGRAs
DescriptionCoarse-grained reconfigurable architectures (CGRAs) strike a fine balance between flexibility and efficiency by incorporating reconfigurable functional units and interconnectivity patterns tailored to specific application domains. However, to fully harness the potential of CGRAs, sophisticated compilation techniques are essential to effectively exploit their architectural features. This paper proposes a comprehensive CGRA compilation framework based on MLIR, which integrates effective computation graph optimization and polyhedral-based tensor optimization methods. Experimental results demonstrate an 82.5% performance improvement on neural network models and a 53.7% reduction in mapping time compared to existing compilation techniques, as well as excellent adaptability for AI applications.
Event Type
Networking
Work-in-Progress Poster
TimeSunday, June 226:00pm - 7:00pm PDT
LocationLevel 3 Lobby