Presentation
An Innovative Memory Design with Internal ECC Functionality Based on In-Memory Computing
DescriptionMemory usually needs to incorporate ECC circuits to prevent soft errors from occurring within it.This paper presents a novel memory design with internal ECC functionality based on in - memory computing. Firstly, we propose an in - memory XNOR macro, which consists of 7T SRAM cells and an XNOR gate. Then, 32 such macros share the subsequent error - correction and detection logic to complete Hamming code encoding and decoding. This design eliminates external encoding and decoding circuits, reducing the area overhead. Simulation results show that the additional area for the ECC in this design is only one - third of that of the traditional method with external ECC logic. Moreover, the encoding, decoding, and error - correction power consumption are reduced by 10.3%, 73.4%, and 52.1% respectively. Finally, in this design, the ECC is independently performed through internal ports and will not interfere with the normal read and write operations of the memory.
Event Type
Networking
Work-in-Progress Poster
TimeMonday, June 236:00pm - 7:00pm PDT
LocationLevel 2 Lobby
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