Presentation
Design guidelines of succinct pulse generators for scalable superconducting qubit controllers
DescriptionThis paper presents design guidelines for scalable architectures to control fixed-frequency transmon qubits.
While cost-effective architectures using simplified RF pulses for quantum gate operations have been proposed, prior works remain at a conceptual level and lack design guidelines to specify required circuit performance and optimize gate fidelity within reasonable circuit costs.
This paper provides minimum necessary circuit configurations that achieve a two-qubit gate fidelity of 99.9% in the absence of decoherence.
This gate fidelity is comparable to that of conventional cost-consuming AWG-based architectures.
Additionally, this paper analyzes the impact of circuit noise on gate fidelity and clarify the performance required to suppress gate fidelity degradation due to noise to a negligible level.
While cost-effective architectures using simplified RF pulses for quantum gate operations have been proposed, prior works remain at a conceptual level and lack design guidelines to specify required circuit performance and optimize gate fidelity within reasonable circuit costs.
This paper provides minimum necessary circuit configurations that achieve a two-qubit gate fidelity of 99.9% in the absence of decoherence.
This gate fidelity is comparable to that of conventional cost-consuming AWG-based architectures.
Additionally, this paper analyzes the impact of circuit noise on gate fidelity and clarify the performance required to suppress gate fidelity degradation due to noise to a negligible level.
Event Type
Networking
Work-in-Progress Poster
TimeSunday, June 226:00pm - 7:00pm PDT
LocationLevel 3 Lobby