Presentation
GTA: An Instruction-Driven Graph Tensor Accelerator for General GNNs
DescriptionVarious graph neural network (GNN) models have emerged and outperformed previous methods. However, their implementation on general-purpose processors is inefficient because GNNs exhibit both sparse graph computation and dense neural network computation patterns. Previous customized GNN accelerators suffer from insufficient programmability, only supporting a limited set of models based on sparse matrix multiplication. Moreover, they fail to account for different sparsity modes and data amounts across GNN tasks, leading to suboptimal resource utilization and computational efficiency. To address these challenges, this paper proposes GTA, a novel instruction-driven Graph Tensor Accelerator to support general GNNs efficiently, together with general compiler optimization rules for optimal dataflow and leverage multi-mode sparsity. The key innovations include 1) A message passing based instruction set architecture to describe general GNNs. 2) Graph tensor compiler with message passing operator fusion and tiling, reducing intermediate data transfers. 3) The hardware architecture for the ISA, in which the flexible computing array can support multiple sparse modes to improve efficiency. 4) An adaptive buffer management unit to fully utilize resources. Experiments show that GTA can execute various GNN models, achieving 1.8-24.6× speedup and 1.3-16.0× energy efficiency compared to existing accelerators.
Event Type
Networking
Work-in-Progress Poster
TimeMonday, June 236:00pm - 7:00pm PDT
LocationLevel 2 Lobby