Presentation
I-PIM: Indirect Address Hashing for Efficient Processing-In-Memory on GPU
DescriptionProcessing-in-Memory (PIM) accelerates memoryintensive workloads by exploiting high memory bandwidth and parallelism. However, PIM performance is maximized only when data placement matches computation; otherwise, the overhead of data movement dominates any performance benefits of PIM. In this work, we explore the challenges of adding PIM to modern GPUs which have address hashing to load-balance the multiple memory channels. We first demonstrate how hashing in modern
GPUs can be reverse-engineered. Based on our understanding of address hashing, we propose I-PIM – hardware-software codesign architecture to optimize data placement for PIM on GPUs that have address hashing.
GPUs can be reverse-engineered. Based on our understanding of address hashing, we propose I-PIM – hardware-software codesign architecture to optimize data placement for PIM on GPUs that have address hashing.
Event Type
Networking
Work-in-Progress Poster
TimeSunday, June 226:00pm - 7:00pm PDT
LocationLevel 3 Lobby
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