Presentation
CarbonEDA: Carbon-Aware Electronic Design Automation for Integrated Circuits
DescriptionWith increasingly complex manufacturing processes, the carbon footprint of the semiconductor industry has become an important consideration in integrated circuit (IC) design. Therefore, it is essential to develop models for quantifying the total carbon footprint associated with an IC throughout its entire lifetime. Total carbon footprint accounts for both embodied carbon from manufacturing and operational carbon from day-to-day use. Although tools for architectural-level analysis of carbon footprint are actively being developed, carbon modeling tools are not yet well integrated with circuit-level Electronic Design Automation tools, which typically optimize many design parameters in an iterative fashion. In this work, we present CarbonEDA, an open-source tool enabling closed-loop Carbon-aware Electronic Design Automation for integrated circuits, in which designers can evaluate trade-offs in energy efficiency and total carbon footprint at circuit design stages. CarbonEDA interfaces directly with industry standard formats for representing layouts, wafer cross-sections, design rules, etc., and enables quantification of carbon footprint in approximately 10 seconds per million polygons in an IC layout. Leveraging CarbonEDA, existing IC design infrastructure can be enhanced to perform operational and embodied carbon footprint analysis for various process technologies – from today's silicon CMOS to emerging transistor technologies, new memories, and 3D integration techniques (e.g., chiplets, interposers, monolithic 3D integration). CarbonEDA enables predictive analysis of carbon footprint during early design stages, which is essential for guiding future directions in carbon-aware IC design.
Event Type
Networking
Work-in-Progress Poster
TimeMonday, June 236:00pm - 7:00pm PDT
LocationLevel 2 Lobby
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