Presentation
VISTA: Optimizing GPU Scheduling through Versatile Locality-Aware Data Sharing
DescriptionGraphics Processing Units (GPUs) play a pivotal
role in high-performance computing by leveraging concurrent
thread execution to enhance processing efficiency, known as
thread-level parallelism (TLP). However, effectively managing the
substantial memory access generated by numerous concurrent
threads presents a significant challenge, impacting performance
and energy consumption. While existing scheduling methods are
recognized solutions for memory challenges in GPUs, they often
overlook the significant potential of data sharing among non-adjacent warps or Cooperative Thread Arrays (CTAs), thereby
limiting their effectiveness in reducing unnecessary memory
accesses through supporting data sharing. Our observation underscores the untapped potential of non-adjacent data sharing,
motivating our work to optimize schedulers more effectively. In
this paper, we present VISTA, a smart locality-aware scheduler
for GPUs that dynamically identifies data locality patterns at both
the CTA and warp levels using intelligent scheduling decisions
to enhance memory efficiency and overall performance. VISTA
significantly reduces unnecessary memory accesses. Simulation
results demonstrate a 48.1% and 51.8% improvement in performance and energy consumption compared to the baseline
for memory-intensive GPGPU applications, respectively, with
negligible hardware overhead.
role in high-performance computing by leveraging concurrent
thread execution to enhance processing efficiency, known as
thread-level parallelism (TLP). However, effectively managing the
substantial memory access generated by numerous concurrent
threads presents a significant challenge, impacting performance
and energy consumption. While existing scheduling methods are
recognized solutions for memory challenges in GPUs, they often
overlook the significant potential of data sharing among non-adjacent warps or Cooperative Thread Arrays (CTAs), thereby
limiting their effectiveness in reducing unnecessary memory
accesses through supporting data sharing. Our observation underscores the untapped potential of non-adjacent data sharing,
motivating our work to optimize schedulers more effectively. In
this paper, we present VISTA, a smart locality-aware scheduler
for GPUs that dynamically identifies data locality patterns at both
the CTA and warp levels using intelligent scheduling decisions
to enhance memory efficiency and overall performance. VISTA
significantly reduces unnecessary memory accesses. Simulation
results demonstrate a 48.1% and 51.8% improvement in performance and energy consumption compared to the baseline
for memory-intensive GPGPU applications, respectively, with
negligible hardware overhead.
Event Type
Research Manuscript
TimeMonday, June 235:00pm - 5:15pm PDT
Location3000, Level 3