Presentation
Dynamic Local Usage: An accurate model for usage of tile-internal wiring in Global Routing
SessionAll You Can Route Buffet
DescriptionTraditional global routing simplifies routing as a
Steiner Tree packing problem on a grid graph, often neglecting
the need to account for tile-internal wiring connections to pin
shapes. Local wiring usage is typically pre-estimated, leading
to inaccuracies. To address this gap, we introduce the Dynamic
Local Usage (DLU) model, which evaluates wiring usage based on
exact wire shapes and optimizes routes up to detailed pin shapes.
Key innovations include tip-to-tip penalty extensions to accurately
model packing density and new algorithms to optimize routes
according to the DLU congestion model.
We demonstrate the superiority of the Dynamic Local Usage
model by comparing results after global and detailed routing to
an industrial global router on the 3nm and 5nm technology nodes.
Our model achieves significant improvements in the number of
vias, scenic routes, design rule violations, and timing metrics after
detailed routing.
Furthermore, the DLU provides a better support for incremental design changes, such as pin movements, by dynamically updating local wiring usage during routing.
Steiner Tree packing problem on a grid graph, often neglecting
the need to account for tile-internal wiring connections to pin
shapes. Local wiring usage is typically pre-estimated, leading
to inaccuracies. To address this gap, we introduce the Dynamic
Local Usage (DLU) model, which evaluates wiring usage based on
exact wire shapes and optimizes routes up to detailed pin shapes.
Key innovations include tip-to-tip penalty extensions to accurately
model packing density and new algorithms to optimize routes
according to the DLU congestion model.
We demonstrate the superiority of the Dynamic Local Usage
model by comparing results after global and detailed routing to
an industrial global router on the 3nm and 5nm technology nodes.
Our model achieves significant improvements in the number of
vias, scenic routes, design rule violations, and timing metrics after
detailed routing.
Furthermore, the DLU provides a better support for incremental design changes, such as pin movements, by dynamically updating local wiring usage during routing.
Event Type
Research Manuscript
TimeTuesday, June 242:00pm - 2:15pm PDT
Location3004, Level 3
EDA
EDA7: Physical Design and Verification