Presentation
Dynamic FPGA Acceleration for Cloud Workloads: A HLS-based JIT Compilation Approach
DescriptionHigh-Level Synthesis (HLS) has transformed FPGA
programming by allowing developers to describe hardware
functionality using high-level languages like C/C++. However,
the long synthesis time of traditional HLS tools hinder the
flexibility required to adapt hardware generation in real-time,
particularly in dynamic environments such as the cloud. In this
paper, we propose Nimble, a novel Just-in-Time (JIT) compilation
framework that brings runtime adaptability to HLS, enabling
transparent FPGA acceleration on cloud workloads without
requiring any hardware expertise. Our evaluation on real-world
applications demonstrated substantial performance gains with
speedups of up to 3.2X in SQL query processing for MySQL.
programming by allowing developers to describe hardware
functionality using high-level languages like C/C++. However,
the long synthesis time of traditional HLS tools hinder the
flexibility required to adapt hardware generation in real-time,
particularly in dynamic environments such as the cloud. In this
paper, we propose Nimble, a novel Just-in-Time (JIT) compilation
framework that brings runtime adaptability to HLS, enabling
transparent FPGA acceleration on cloud workloads without
requiring any hardware expertise. Our evaluation on real-world
applications demonstrated substantial performance gains with
speedups of up to 3.2X in SQL query processing for MySQL.
Event Type
Networking
Work-in-Progress Poster
TimeSunday, June 226:00pm - 7:00pm PDT
LocationLevel 3 Lobby