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A Novel Multi-Node-Upset Recoverability Verification Method with Generalized Model for Radiation-Hardened Latches
DescriptionThe shrinking of transistor feature sizes and supply voltages for the nanoscale CMOS technology makes integrated circuits increasingly susceptible to soft errors in radiation environments. To protect against soft errors, researchers have proposed various single-node-upset (SNU) and/or multi-node-upset (MNU) mitigated latches by utilizing the radiation hardening by design (RHBD) approach, whereas the node-upset recoverability verification of the existing latches is highly dependent on Electronic Design Automation (EDA) tools for taking into account the complex combinations of error injections. In this paper, an automatic verification method for MNU-recovery of latches is firstly proposed, which abstracts the directed graph that can express the controlled relationship among all nodes from the latch structure. The MNU-recovery of latches can then be verified based on the constructed directed graph, significantly simplifying the traditional verification process. Moreover, a generalized latch model is proposed and it is proven, using the proposed verification method, that any latch satisfying this model can recover from n-node-upset.