Presentation
Simulation-based Parallel Sweeping: A New Perspective on Combinational Equivalence Checking
DescriptionCombinational equivalence checking (CEC) is a fundamental task in the realization of digital designs which is unlikely to have universally efficient algorithms due to its co-NP-completeness. Recent researches of CEC have been focusing on SAT sweeping. This paper provides a new perspective other than SAT for tackling CEC, namely exhaustive simulation, and presents a simulation-based CEC engine constructed with fast GPU-parallel algorithms. The proposed engine can solve 4 out of the 9 large cases in the experiments on its own, with up to 88.11x speed-up compared with the checker in ABC. Moreover, a combination of the proposed engine with the ABC checker achieves averaged accelerations of 4.89x and 4.88x over the standalone ABC checker and a commercial checker, respectively.
Event Type
Research Manuscript
TimeWednesday, June 254:45pm - 5:00pm PDT
Location3003, Level 3
EDA2: Design Verification and Validation