Presentation
Machine Learning-Driven STL Generation for Enhancing Functional Safety of E/E Systems
DescriptionThe increasing complexity of safety-critical hardware systems demands advanced methods for ensuring functional safety (FuSa).
Traditional techniques like ATPG and BIST are intrusive, requiring
additional hardware and disrupting operations, making them unsuitable
for in-field testing. To address this, for the first time, we propose
a machine learning (ML)-driven automated Self-Test Library (STL)
generation for seamless in-field testing during idle periods, ensuring
uninterrupted fault detection and high system performance. Utilizing
reinforcement learning, the STL generates design-specific test patterns,
achieving up to 57.57% improvement in fault coverage and up to
85% efficiency compared to existing pattern-based testing,
enhancing FuSa in mission-critical applications.
Traditional techniques like ATPG and BIST are intrusive, requiring
additional hardware and disrupting operations, making them unsuitable
for in-field testing. To address this, for the first time, we propose
a machine learning (ML)-driven automated Self-Test Library (STL)
generation for seamless in-field testing during idle periods, ensuring
uninterrupted fault detection and high system performance. Utilizing
reinforcement learning, the STL generates design-specific test patterns,
achieving up to 57.57% improvement in fault coverage and up to
85% efficiency compared to existing pattern-based testing,
enhancing FuSa in mission-critical applications.
Event Type
Research Manuscript
TimeTuesday, June 241:45pm - 2:00pm PDT
Location3006, Level 3
EDA
EDA9: Design for Test and Silicon Lifecycle Management