Presentation
LPA-NTT: Efficient Lightweight Polynomial Multiplication Accelerator with Hybrid NTT Algorithm
DescriptionPolynomial multiplication, a core component of lattice-based cryptography, has demonstrated impressive performance for lattice cryptography chips. However, costly Number Theoretic Transform (NTT) make efficient and flexible hardware design to be extremely challenging, particularly for ASIC/FPGA-based hardware acceleration solutions that often face difficulties with high resource consumption and low computational efficiency. In this paper we propose LPA-NTT, which adheres to the same principles applicable to various post-quantum cryptography (PQC) algorithms and operates under very strict power constraints. Despite these limitations, our approach demonstrates state-of-the-art computing performance for complex applications like NTT by eliminating pre-computing operation and near-memory mapping scheme, thereby reducing computational dimensions and data relocate. Our experimental results show that LPA-NTT outperforms previous best NTT accelerators by 14.8%~36.7% in terms of resource consumption, while also significantly reducing area and power overhead.
Event Type
Networking
Work-in-Progress Poster
TimeSunday, June 226:00pm - 7:00pm PDT
LocationLevel 3 Lobby