Presentation
PICK: An SRAM-based Processing-in-Memory Accelerator for K-Nearest-Neighbor Search in Point Clouds*
DescriptionIn this work, we present PICK, an efficient processing-in-memory (PIM) architecture designed to accelerate kNN search in point cloud applications. We exploit bit-serial-based-PIM (BS-PIM) and customized computing modules to efficiently perform the elementary operations in kNN search,
i.e., distance calculation and top-k search. The in-situ and bit-serial-based computing approach of BS-PIM significantly reduces on-chip data movements and simplifies circuit design, enabling an expanded on-chip memory that fully eliminates runtime off-chip memory access. For the distance calculation,
we propose a bit-width clipping method to reduce the high latency typically associated with the bit-serial algorithm, with negligible accuracy degradation. Such an optimization allows flexible trade-offs between performance and accuracy as well, for various scenarios with different priorities. For the top-k search, we propose an efficient filtering-and-selection search strategy to handle arbitrary values of k with approximately constant time complexity. Additionally, a two-stage pipeline is applied to parallelize the execution of distance calculation and top-k search, hiding latency and enhancing system.
i.e., distance calculation and top-k search. The in-situ and bit-serial-based computing approach of BS-PIM significantly reduces on-chip data movements and simplifies circuit design, enabling an expanded on-chip memory that fully eliminates runtime off-chip memory access. For the distance calculation,
we propose a bit-width clipping method to reduce the high latency typically associated with the bit-serial algorithm, with negligible accuracy degradation. Such an optimization allows flexible trade-offs between performance and accuracy as well, for various scenarios with different priorities. For the top-k search, we propose an efficient filtering-and-selection search strategy to handle arbitrary values of k with approximately constant time complexity. Additionally, a two-stage pipeline is applied to parallelize the execution of distance calculation and top-k search, hiding latency and enhancing system.
Event Type
Research Manuscript
TimeTuesday, June 243:30pm - 3:45pm PDT
Location3001, Level 3
Design
DES2B: In-memory and Near-memory Computing Architectures, Applications and Systems