Presentation
HLSRanker: Design Space Exploration in High-Level Synthesis Using Preference Bayesian Optimization
DescriptionDesign space exploration (DSE) in high-level synthesis (HLS) aims at obtaining optimal combinations among a vast set of directive configurations to generate high-quality circuit designs. Due to challenges such as high-dimensional optimization and limited data, existing DSE methods perform poorly in handling complex configuration interactions. This work proposes a DSE framework, HLSRanker, based on preference Bayesian optimization (PBO), which utilizes pairwise comparisons between directive combinations to quickly and effectively explore the Pareto fronts. Firstly, a winner model based on graph neural networks (GNNs) is constructed to determine the winner between a pair of directive combinations. Importantly, a novel pairwise comparison-based PBO exploration engine has been proposed for sampling potentially better configurations. Experimental results show that our framework can explore higher-quality Pareto-optimal designs in a shorter runtime compared to state-of-the-art (SOTA) DSE methods.
Event Type
Networking
Work-in-Progress Poster
TimeMonday, June 236:00pm - 7:00pm PDT
LocationLevel 2 Lobby
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