Presentation
Co-design of Quantum Processors for NISQ Applications
DescriptionWithin the noisy intermediate-scale quantum (NISQ) regime, quantum computers have the potential to
perform tasks that cannot be achieved on classical hardware. A logical question to ask is how the architecture and design of quantum information processors impacts their effectiveness to address problems of interest. In some architectures, such as those with atomic qubits, qubits are not fixed in space, but can instead by dynamically reconfigured. Using this architectural flexibility, we explore the co-design of trapped-ion quantum computers with NISQ applications. By incorporating quantum error correction strategies and conducting detailed performance and resource estimations, we show that architectural decisions are impactful for practical utility, even when component performance metrics such as gate fidelity and speed remain fixed.
perform tasks that cannot be achieved on classical hardware. A logical question to ask is how the architecture and design of quantum information processors impacts their effectiveness to address problems of interest. In some architectures, such as those with atomic qubits, qubits are not fixed in space, but can instead by dynamically reconfigured. Using this architectural flexibility, we explore the co-design of trapped-ion quantum computers with NISQ applications. By incorporating quantum error correction strategies and conducting detailed performance and resource estimations, we show that architectural decisions are impactful for practical utility, even when component performance metrics such as gate fidelity and speed remain fixed.
Event Type
Research Special Session
TimeMonday, June 231:30pm - 2:00pm PDT
Location3010, Level 3
Design