Presentation
Multi-Scale Thermal-Mechanical Modeling of Advanced Chips
DescriptionAs silicon transistor scaling slows, advancements in packaging and 3DIC technologies have become essential for improving semiconductor system performance. However, these technologies introduce significant thermal and mechanical design complexities, which can drastically reduce reliability and yields. To overcome thermal-stress challenges, multi-scale physics simulations are needed to identify design flaws before mass production. However, existing modeling tools struggle to scale to complex systems. In this presentation, we showcase an AI-accelerated, multi-scale thermal-stress simulator that enables highly accurate simulations with up to 1000x speedups over traditional finite element method solvers. This framework utilizes specialized AI models to simulate thermal stress across systems, from centimeter-scale interposers down to nanometer-scale interconnects and vias, all within a single, comprehensive simulation. With this approach, engineers can explore, identify, and resolve thermal-stress design challenges early, ultimately shortening development cycles and reducing time-to-market for advanced semiconductor chips.
Event Type
Research Special Session
TimeMonday, June 234:30pm - 5:00pm PDT
Location3010, Level 3