Presentation
Powering the Future: Mastering IEEE 2416 System Level Power Modeling Standard for Low-Power AI and Beyond
DescriptionThis tutorial will provide attendees with a comprehensive understanding of the IEEE 2416 standard, used for system level power modeling in the design and analysis of integrated circuits and systems. Participants will gain practical knowledge necessary to implement and utilize the standard effectively. The tutorial will highlight the pressing need for low-power design methodologies, particularly in cutting-edge fields like AI, where computational demands are high. By getting a clear understanding of the IEEE 2416 standard, attendees will be equipped to make decisions on how the standard can be incorporated into their design flow to deliver the efficiencies needed to build their cutting edge low power designs. The presenters, who are experts from different industry segments (EDA, Foundry, SoC and IP) and academia will use the IEEE2416-2025 version of the standard that is being released at DAC 2025 to explain concepts presented in the tutorial.
This tutorial is tailored for: • IP Developers: Engineers responsible for designing and characterizing IP blocks who need to create accurate and efficient power models.
• SoC Architects and Designers: Professionals involved in system-level design and integration who require a deep understanding of power analysis and optimization using the 2416 standard.
• EDA Tool Providers and Users: Developers and users of EDA tools who need to integrate and leverage the capabilities of the 2416 standard in their workflows.
Section 1: Introduction to IEEE 2416 and Power Modeling Evolution (Nagu Dhanwada)
Section 2: Core Concepts of IEEE 2416 – Digital and AMS Highlights (Akil Sutton)
Section 3: Real-World Applications – Industry Deep Dives (Eunju Hwang, Pritesh Johari)
Section 4: System-Level Example: AI Accelerator with AMS Blocks (Daniel Cross, Rhett Davis)
This tutorial is tailored for: • IP Developers: Engineers responsible for designing and characterizing IP blocks who need to create accurate and efficient power models.
• SoC Architects and Designers: Professionals involved in system-level design and integration who require a deep understanding of power analysis and optimization using the 2416 standard.
• EDA Tool Providers and Users: Developers and users of EDA tools who need to integrate and leverage the capabilities of the 2416 standard in their workflows.
Section 1: Introduction to IEEE 2416 and Power Modeling Evolution (Nagu Dhanwada)
Section 2: Core Concepts of IEEE 2416 – Digital and AMS Highlights (Akil Sutton)
Section 3: Real-World Applications – Industry Deep Dives (Eunju Hwang, Pritesh Johari)
Section 4: System-Level Example: AI Accelerator with AMS Blocks (Daniel Cross, Rhett Davis)
Event Type
Tutorial
TimeSunday, June 229:00am - 12:30pm PDT
Location3008, Level 3
AI
Sunday Program