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Presenter

Luca Benini
Università di Bologna
Presentations
Research Manuscript
Dual-Issue Execution of Mixed Integer and Floating-Point Workloads on Energy-Efficient In-Order RISC-V Cores
5:00pm - 5:15pm PDT Tuesday, June 24 3003, Level 3
Design
DES4: Digital and Analog Circuits
Research Manuscript
Fast End-to-End Simulation and Exploration of Many-Core Baseband Transceivers for Software-Defined Radio-Access Networks
3:30pm - 3:45pm PDT Monday, June 23 3008, Level 3
Systems
SYS2: Design of Cyber-Physical Systems and IoT