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Presenter

Hiromitsu Awano
Kyoto University
Presentations
Research Manuscript
Weighted Range-Constrained Ising-Model Decoder for Quantum Error Correction
Design
DES6: Quantum Computing
Research Manuscript
Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation
Design
DES2A: In-memory and Near-memory Computing Circuits
Networking
Work-in-Progress Poster
Design guidelines of succinct pulse generators for scalable superconducting qubit controllers