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Presenter

Jinshan Yue
Institute of Microelectronics, Chinese Academy of Sciences
Presentations
Research Manuscript
An Energy-Efficient High-Utilization Hardware Architecture for Attention Mechanism in Transformer using Balanced Systolic Array and Multi-Row Interleaved Operation Ordering
2:30pm - 2:45pm PDT Monday, June 23 3001, Level 3
AI
AI3: AI/ML Architecture Design
Research Manuscript
Efficient Edge Vision Transformer Accelerator with Decoupled Chunk Attention and Hybrid Computing-In-Memory
11:00am - 11:15am PDT Tuesday, June 24 3002, Level 3
Design
DES2B: In-memory and Near-memory Computing Architectures, Applications and Systems