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Presenter

Giuseppe Di Guglielmo
Biography
Giuseppe Di Guglielmo is a Senior Engineer at Fermilab specializing in system-level design and hardware acceleration for AI/ML. He currently works with scientists to develop intelligent detectors for harsh environments with ultra-low latency needs. Recent projects include designing radiation-resistant ML-enriched chips for the Large Hadron Collider and integrating ML algorithms for quantum readout and control into hardware operating at cryo temperatures. Before joining Fermilab, Giuseppe was a Research Scientist at Columbia University in New York and a postdoc at Tokyo University. He holds a Ph.D. in Computer Science and has over 10 years of experience with high-level synthesis for ASIC and FPGA design. He actively contributes to open-source communities for SoC design and AI/ML acceleration, such as ESP and hls4ml.
Presentations
Tutorial
1:30pm - 3:00pm PDT Sunday, June 22 3008, Level 3
AI
Sunday Program
Chair of Sessions
Research Manuscript
3:30pm - 5:30pm PDT Tuesday, June 24 3004, Level 3
EDA
EDA1: Design Methodologies for System-on-Chip and 3D/2.5D System-in Package