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Presenter

Jianfei Jiang
Shanghai Jiao Tong University
Presentations
Research Manuscript
BitPattern: Enabling Efficient Bit-Serial Acceleration of Deep Neural Networks through Bit-Pattern Pruning
10:45am - 11:00am PDT Tuesday, June 24 3000, Level 3
AI
AI4: AI/ML System and Platform Design
Research Manuscript
Principle-based Dataflow Optimization for Communication Lower Bound in Operator-Fused Tensor Accelerator
4:45pm - 5:00pm PDT Wednesday, June 25 3002, Level 3
Design
DES1: SoC, Heterogeneous, and Reconfigurable Architectures
Research Manuscript
HPIM-NoC: A Priori-Knowledge-Based Optimization Framework for Heterogeneous PIM-Based NoCs
4:00pm - 4:15pm PDT Monday, June 23 3002, Level 3
Design
DES1: SoC, Heterogeneous, and Reconfigurable Architectures
Research Manuscript
AttenPIM: Accelerating LLM Attention with Dual-mode GEMV in Processing-in-Memory
3:45pm - 4:00pm PDT Wednesday, June 25 3001, Level 3
Design
DES2B: In-memory and Near-memory Computing Architectures, Applications and Systems
Research Manuscript
VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator
1:30pm - 1:45pm PDT Tuesday, June 24 3002, Level 3
AI
AI4: AI/ML System and Platform Design
Research Manuscript
KVO-LLM: Boosting Long-Context Generation Throughput for Batched LLM Inference
2:15pm - 2:30pm PDT Monday, June 23 3001, Level 3
AI
AI3: AI/ML Architecture Design