Close

Presenter

Jiarui Wang
Peking University
Presentations
Research Manuscript
A Systematic Approach for Multi-Objective Double-Side Clock Tree Synthesis
2:15pm - 2:30pm PDT Wednesday, June 25 3006, Level 3
EDA
EDA7: Physical Design and Verification
Research Manuscript
Synergistic Die-Level Router for Multi-FPGA System with Time-Division Multiplexing Optimization
5:15pm - 5:30pm PDT Tuesday, June 24 3004, Level 3
EDA
EDA1: Design Methodologies for System-on-Chip and 3D/2.5D System-in Package