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Presenter

Xiaowei Li
Institute of Computing Technology, Chinese Academy of Sciences
Presentations
Research Manuscript
Ares: High Performance Near-Storage Accelerator for FHE-based Private Set Intersection
1:30pm - 1:45pm PDT Wednesday, June 25 3002, Level 3
Design
DES2B: In-memory and Near-memory Computing Architectures, Applications and Systems
Research Manuscript
PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT
2:15pm - 2:30pm PDT Tuesday, June 24 3006, Level 3
EDA
EDA9: Design for Test and Silicon Lifecycle Management
Research Manuscript
EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components
2:00pm - 2:15pm PDT Tuesday, June 24 3006, Level 3
EDA
EDA9: Design for Test and Silicon Lifecycle Management
Networking
Work-in-Progress Poster
Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation
6:00pm - 7:00pm PDT Sunday, June 22 Level 3 Lobby
Research Manuscript
Hypnos: Memory Efficient Homomorphic Processing Unit
4:30pm - 4:45pm PDT Monday, June 23 3002, Level 3
Design
DES1: SoC, Heterogeneous, and Reconfigurable Architectures
Research Manuscript
MOSS: Multi-Modal Representation Learning on Sequential Circuits
11:00am - 11:15am PDT Wednesday, June 25 3000, Level 3
AI
AI2: AI/ML Application and Infrastructure