Presenter
Maxence Bouvier
Biography
After an internship in 2016 at the University of Pennsylvania, and a Master’s Thesis at the IBM T.J. Watson Research Center; Maxence Bouvier graduated from the Master Nanotech, which is a joint venture of Polito, Grenoble INP Phelma, and EPFL, targeting micro and nano fabrication, in 2017.
From 2018 to 2021, he spent three years working on its Ph.D. study at the DSCIN/LSTA laboratory of the CEA of Grenoble, during which he published 3 papers, deposited 3 patents and was awarded the ISSCC Student Travel Grant Award in 2019.
Since April 2021, he is a System-on-Chip Design Engineer at STMicroelectronics in Grenoble.
From 2018 to 2021, he spent three years working on its Ph.D. study at the DSCIN/LSTA laboratory of the CEA of Grenoble, during which he published 3 papers, deposited 3 patents and was awarded the ISSCC Student Travel Grant Award in 2019.
Since April 2021, he is a System-on-Chip Design Engineer at STMicroelectronics in Grenoble.
Presentations
Networking
Work-in-Progress Poster
