Presenter
Joerg Henkel
Presentations
Research Manuscript
EDA
EDA5: RTL/Logic Level and High-level Synthesis
Late Breaking Results
Research Manuscript
Systems
SYS4: Embedded System Design Tools and Methodologies
Late Breaking Results
11:45am - 12:00pm PDT Wednesday, June 25 3004, Level 3
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby
5:00pm - 5:15pm PDT Wednesday, June 25 3006, Level 3
6:00pm - 7:00pm PDT Monday, June 23 Level 2 Lobby