Session

DescriptionThis session explores advanced methods in the verification and validation of design, focusing on scalable, parallel, and learning-driven approaches. Papers presented cover innovations such as GPU-accelerated RTL simulation, fuzzing frameworks for network-on-chip verification, and multi-agent guided optimization for logic synthesis. With a focus on simulation, scaling, and parallelization, the research presented pushes the boundaries of modern verification practices, addressing complex challenges and offering more efficient, automated solutions for large-scale designs.