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Research Manuscript: ML-Powered Logic Synthesis
DescriptionThe use of machine learning (ML) in EDA is a burgeoning research direction and this session includes six papers aligned with this important theme. The first three papers make use of large language models (LLMs) for generating synthesis scripts and for generating Chisel and Verilog RTL code. The next paper uses generative AI, a diffusion model, for logic optimization. The next paper is related to multiplexer synthesis, and offers a significant area reduction vs. the state-of-the-art. The last paper uses an actor-critic neural-network approach in the context of optimizing dynamic voltage-frequency scaling (DVFS).
Event TypeResearch Manuscript
TimeWednesday, June 2510:30am - 12:00pm PDT
Location3004, Level 3
Topics
EDA
Tracks
EDA5: RTL/Logic Level and High-level Synthesis